1 //#define __AVR_ATmega48P__
\r
3 #include <util/delay_basic.h>
\r
5 #define PORTB_CONFIG 0b11100001
\r
6 #define PORTD_CONFIG 0b11100000
\r
9 void uart_init(uint16_t ubrr);
\r
11 void shit_raw(uint8_t c);
\r
12 void shit_encoded(uint8_t n);
\r
15 void uart_init(uint16_t ubrr) {
\r
16 UBRR0H = (unsigned char)(ubrr>>8);
\r
17 UBRR0L = (unsigned char)(ubrr);
\r
19 UCSR0B = (1<<RXEN0)|(1<<TXEN0);
\r
20 UCSR0C = (1<<USBS0)|(3<<UCSZ00);
\r
24 while(!(UCSR0A & (1<<RXC0)));
\r
28 void shit_raw(uint8_t c) {
\r
29 // (c & 0b00000001) is always 0
\r
30 PORTD = c & 0b11100000;
\r
31 PORTB = ((c & 0b00011100) << 3)|((c & 0b00000010)>>1);
\r
34 void shit_encoded(uint8_t n) {
\r
35 if( n > 15 ) n = 14;
\r
37 case 0: shit_raw(0b11101110); break;
\r
38 case 1: shit_raw(0b00101000); break;
\r
39 case 2: shit_raw(0b01011110); break;
\r
40 case 3: shit_raw(0b01111100); break;
\r
41 case 4: shit_raw(0b10111000); break;
\r
42 case 5: shit_raw(0b11110100); break;
\r
43 case 6: shit_raw(0b11110110); break;
\r
44 case 7: shit_raw(0b01101000); break;
\r
45 case 8: shit_raw(0b11111110); break;
\r
46 case 9: shit_raw(0b11111100); break;
\r
47 case 10: shit_raw(0b11111010); break; // A
\r
48 case 11: shit_raw(0b10110110); break; // B
\r
49 case 12: shit_raw(0b11000110); break; // C
\r
50 case 13: shit_raw(0b00111110); break; // D
\r
51 case 14: shit_raw(0b11010110); break; // E
\r
52 case 15: shit_raw(0b11010010); break; // F
\r
58 DDRB = PORTB_CONFIG;
\r
59 DDRD = PORTD_CONFIG;
\r
61 // run quick test sequence
\r
63 for(; n < 16; n++ ) {
\r
65 _delay_loop_2(30000UL);
\r
72 if (n & (1<<7)) shit_raw((n & 0b01111111) << 1);
\r
73 else shit_encoded(n);
\r