Updated from ../=mpn/gmp-1.906.7
[kopensolaris-gnu/glibc.git] / stdlib / longlong.h
1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2
3 Copyright (C) 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
4
5 This file is free software; you can redistribute it and/or modify
6 it under the terms of the GNU Library General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or (at your
8 option) any later version.
9
10 This file is distributed in the hope that it will be useful, but
11 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Library General Public
13 License for more details.
14
15 You should have received a copy of the GNU Library General Public License
16 along with this file; see the file COPYING.LIB.  If not, write to
17 the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
18
19 /* You have to define the following before including this file:
20
21    UWtype -- An unsigned type, default type for operations (typically a "word")
22    UHWtype -- An unsigned type, at least half the size of UWtype.
23    UDWtype -- An unsigned type, at least twice as large a UWtype
24    W_TYPE_SIZE -- size in bits of UWtype
25
26    SItype, USItype -- Signed and unsigned 32 bit types.
27    DItype, UDItype -- Signed and unsigned 64 bit types.
28
29    On a 32 bit machine UWtype should typically be USItype;
30    on a 64 bit machine, UWtype should typically be UDItype.
31 */
32
33 #define __BITS4 (W_TYPE_SIZE / 4)
34 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
35 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
36 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
37
38 /* Define auxiliary asm macros.
39
40    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
41    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
42    word product in HIGH_PROD and LOW_PROD.
43
44    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
45    UDWtype product.  This is just a variant of umul_ppmm.
46
47    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
48    denominator) divides a UDWtype, composed by the UWtype integers
49    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
50    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
51    than DENOMINATOR for correct operation.  If, in addition, the most
52    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
53    UDIV_NEEDS_NORMALIZATION is defined to 1.
54
55    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
56    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
57    is rounded towards 0.
58
59    5) count_leading_zeros(count, x) counts the number of zero-bits from the
60    msb to the first non-zero bit in the UWtype X.  This is the number of
61    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
62    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
63
64    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
65    from the least significant end.
66
67    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
68    high_addend_2, low_addend_2) adds two UWtype integers, composed by
69    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
70    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
71    (i.e. carry out) is not stored anywhere, and is lost.
72
73    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
74    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
75    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
76    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
77    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
78    and is lost.
79
80    If any of these macros are left undefined for a particular CPU,
81    C macros are used.  */
82
83 /* The CPUs come in alphabetical order below.
84
85    Please add support for more CPUs here, or improve the current support
86    for the CPUs below!  */
87
88 #if defined (__GNUC__) && !defined (NO_ASM)
89
90 /* We sometimes need to clobber "cc" with gcc2, but that would not be
91    understood by gcc1.  Use cpp to avoid major code duplication.  */
92 #if __GNUC__ < 2
93 #define __CLOBBER_CC
94 #define __AND_CLOBBER_CC
95 #else /* __GNUC__ >= 2 */
96 #define __CLOBBER_CC : "cc"
97 #define __AND_CLOBBER_CC , "cc"
98 #endif /* __GNUC__ < 2 */
99
100 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
101 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
102   __asm__ ("add %1,%4,%5
103         addc %0,%2,%3"                                                  \
104            : "=r" ((USItype)(sh)),                                      \
105             "=&r" ((USItype)(sl))                                       \
106            : "%r" ((USItype)(ah)),                                      \
107              "rI" ((USItype)(bh)),                                      \
108              "%r" ((USItype)(al)),                                      \
109              "rI" ((USItype)(bl)))
110 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
111   __asm__ ("sub %1,%4,%5
112         subc %0,%2,%3"                                                  \
113            : "=r" ((USItype)(sh)),                                      \
114              "=&r" ((USItype)(sl))                                      \
115            : "r" ((USItype)(ah)),                                       \
116              "rI" ((USItype)(bh)),                                      \
117              "r" ((USItype)(al)),                                       \
118              "rI" ((USItype)(bl)))
119 #define umul_ppmm(xh, xl, m0, m1) \
120   do {                                                                  \
121     USItype __m0 = (m0), __m1 = (m1);                                   \
122     __asm__ ("multiplu %0,%1,%2"                                        \
123              : "=r" ((USItype)(xl))                                     \
124              : "r" (__m0),                                              \
125                "r" (__m1));                                             \
126     __asm__ ("multmu %0,%1,%2"                                          \
127              : "=r" ((USItype)(xh))                                     \
128              : "r" (__m0),                                              \
129                "r" (__m1));                                             \
130   } while (0)
131 #define udiv_qrnnd(q, r, n1, n0, d) \
132   __asm__ ("dividu %0,%3,%4"                                            \
133            : "=r" ((USItype)(q)),                                       \
134              "=q" ((USItype)(r))                                        \
135            : "1" ((USItype)(n1)),                                       \
136              "r" ((USItype)(n0)),                                       \
137              "r" ((USItype)(d)))
138 #define count_leading_zeros(count, x) \
139     __asm__ ("clz %0,%1"                                                \
140              : "=r" ((USItype)(count))                                  \
141              : "r" ((USItype)(x)))
142 #endif /* __a29k__ */
143
144 #if defined (__alpha__) && W_TYPE_SIZE == 64
145 #define umul_ppmm(ph, pl, m0, m1) \
146   do {                                                                  \
147     UDItype __m0 = (m0), __m1 = (m1);                                   \
148     __asm__ ("umulh %r1,%2,%0"                                          \
149              : "=r" ((UDItype) ph)                                      \
150              : "%rJ" (__m0),                                            \
151                "rI" (__m1));                                            \
152     (pl) = __m0 * __m1;                                                 \
153   } while (0)
154 #define UMUL_TIME 46
155 #ifndef LONGLONG_STANDALONE
156 #define udiv_qrnnd(q, r, n1, n0, d) \
157   do { UDItype __r;                                                     \
158     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
159     (r) = __r;                                                          \
160   } while (0)
161 extern UDItype __udiv_qrnnd ();
162 #define UDIV_TIME 220
163 #endif /* LONGLONG_STANDALONE */
164 #endif /* __alpha__ */
165
166 #if defined (__arm__) && W_TYPE_SIZE == 32
167 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
168   __asm__ ("adds        %1, %4, %5
169         adc     %0, %2, %3"                                             \
170            : "=r" ((USItype)(sh)),                                      \
171              "=&r" ((USItype)(sl))                                      \
172            : "%r" ((USItype)(ah)),                                      \
173              "rI" ((USItype)(bh)),                                      \
174              "%r" ((USItype)(al)),                                      \
175              "rI" ((USItype)(bl)))
176 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
177   __asm__ ("subs        %1, %4, %5
178         sbc     %0, %2, %3"                                             \
179            : "=r" ((USItype)(sh)),                                      \
180              "=&r" ((USItype)(sl))                                      \
181            : "r" ((USItype)(ah)),                                       \
182              "rI" ((USItype)(bh)),                                      \
183              "r" ((USItype)(al)),                                       \
184              "rI" ((USItype)(bl)))
185 #define umul_ppmm(xh, xl, a, b) \
186   __asm__ ("%@ Inlined umul_ppmm
187         mov     %|r0, %2, lsr #16
188         mov     %|r2, %3, lsr #16
189         bic     %|r1, %2, %|r0, lsl #16
190         bic     %|r2, %3, %|r2, lsl #16
191         mul     %1, %|r1, %|r2
192         mul     %|r2, %|r0, %|r2
193         mul     %|r1, %0, %|r1
194         mul     %0, %|r0, %0
195         adds    %|r1, %|r2, %|r1
196         addcs   %0, %0, #65536
197         adds    %1, %1, %|r1, lsl #16
198         adc     %0, %0, %|r1, lsr #16"                                  \
199            : "=&r" ((USItype)(xh)),                                     \
200              "=r" ((USItype)(xl))                                       \
201            : "r" ((USItype)(a)),                                        \
202              "r" ((USItype)(b))                                         \
203            : "r0", "r1", "r2")
204 #define UMUL_TIME 20
205 #define UDIV_TIME 100
206 #endif /* __arm__ */
207
208 #if defined (__clipper__) && W_TYPE_SIZE == 32
209 #define umul_ppmm(w1, w0, u, v) \
210   ({union {UDItype __ll;                                                \
211            struct {USItype __l, __h;} __i;                              \
212           } __xx;                                                       \
213   __asm__ ("mulwux %2,%0"                                               \
214            : "=r" (__xx.__ll)                                           \
215            : "%0" ((USItype)(u)),                                       \
216              "r" ((USItype)(v)));                                       \
217   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
218 #define smul_ppmm(w1, w0, u, v) \
219   ({union {DItype __ll;                                                 \
220            struct {SItype __l, __h;} __i;                               \
221           } __xx;                                                       \
222   __asm__ ("mulwx %2,%0"                                                \
223            : "=r" (__xx.__ll)                                           \
224            : "%0" ((SItype)(u)),                                        \
225              "r" ((SItype)(v)));                                        \
226   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
227 #define __umulsidi3(u, v) \
228   ({UDItype __w;                                                        \
229     __asm__ ("mulwux %2,%0"                                             \
230              : "=r" (__w)                                               \
231              : "%0" ((USItype)(u)),                                     \
232                "r" ((USItype)(v)));                                     \
233     __w; })
234 #endif /* __clipper__ */
235
236 #if defined (__gmicro__) && W_TYPE_SIZE == 32
237 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
238   __asm__ ("add.w %5,%1
239         addx %3,%0"                                                     \
240            : "=g" ((USItype)(sh)),                                      \
241              "=&g" ((USItype)(sl))                                      \
242            : "%0" ((USItype)(ah)),                                      \
243              "g" ((USItype)(bh)),                                       \
244              "%1" ((USItype)(al)),                                      \
245              "g" ((USItype)(bl)))
246 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
247   __asm__ ("sub.w %5,%1
248         subx %3,%0"                                                     \
249            : "=g" ((USItype)(sh)),                                      \
250              "=&g" ((USItype)(sl))                                      \
251            : "0" ((USItype)(ah)),                                       \
252              "g" ((USItype)(bh)),                                       \
253              "1" ((USItype)(al)),                                       \
254              "g" ((USItype)(bl)))
255 #define umul_ppmm(ph, pl, m0, m1) \
256   __asm__ ("mulx %3,%0,%1"                                              \
257            : "=g" ((USItype)(ph)),                                      \
258              "=r" ((USItype)(pl))                                       \
259            : "%0" ((USItype)(m0)),                                      \
260              "g" ((USItype)(m1)))
261 #define udiv_qrnnd(q, r, nh, nl, d) \
262   __asm__ ("divx %4,%0,%1"                                              \
263            : "=g" ((USItype)(q)),                                       \
264              "=r" ((USItype)(r))                                        \
265            : "1" ((USItype)(nh)),                                       \
266              "0" ((USItype)(nl)),                                       \
267              "g" ((USItype)(d)))
268 #define count_leading_zeros(count, x) \
269   __asm__ ("bsch/1 %1,%0"                                               \
270            : "=g" (count)                                               \
271            : "g" ((USItype)(x)),                                        \
272              "0" ((USItype)0))
273 #endif
274
275 #if defined (__hppa) && W_TYPE_SIZE == 32
276 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
277   __asm__ ("add %4,%5,%1
278         addc %2,%3,%0"                                                  \
279            : "=r" ((USItype)(sh)),                                      \
280              "=&r" ((USItype)(sl))                                      \
281            : "%rM" ((USItype)(ah)),                                     \
282              "rM" ((USItype)(bh)),                                      \
283              "%rM" ((USItype)(al)),                                     \
284              "rM" ((USItype)(bl)))
285 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
286   __asm__ ("sub %4,%5,%1
287         subb %2,%3,%0"                                                  \
288            : "=r" ((USItype)(sh)),                                      \
289              "=&r" ((USItype)(sl))                                      \
290            : "rM" ((USItype)(ah)),                                      \
291              "rM" ((USItype)(bh)),                                      \
292              "rM" ((USItype)(al)),                                      \
293              "rM" ((USItype)(bl)))
294 #if defined (_PA_RISC1_1)
295 #define umul_ppmm(wh, wl, u, v) \
296   do {                                                                  \
297     union {UDItype __ll;                                                \
298            struct {USItype __h, __l;} __i;                              \
299           } __xx;                                                       \
300     __asm__ ("xmpyu %1,%2,%0"                                           \
301              : "=fx" (__xx.__ll)                                        \
302              : "fx" ((USItype)(u)),                                     \
303                "fx" ((USItype)(v)));                                    \
304     (wh) = __xx.__i.__h;                                                \
305     (wl) = __xx.__i.__l;                                                \
306   } while (0)
307 #define UMUL_TIME 8
308 #define UDIV_TIME 60
309 #else
310 #define UMUL_TIME 40
311 #define UDIV_TIME 80
312 #endif
313 #ifndef LONGLONG_STANDALONE
314 #define udiv_qrnnd(q, r, n1, n0, d) \
315   do { USItype __r;                                                     \
316     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
317     (r) = __r;                                                          \
318   } while (0)
319 extern USItype __udiv_qrnnd ();
320 #endif /* LONGLONG_STANDALONE */
321 #define count_leading_zeros(count, x) \
322   do {                                                                  \
323     USItype __tmp;                                                      \
324     __asm__ (                                                           \
325        "ldi             1,%0
326         extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?
327         extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.
328         ldo             16(%0),%0               ; Yes.  Perform add.
329         extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?
330         extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.
331         ldo             8(%0),%0                ; Yes.  Perform add.
332         extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?
333         extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.
334         ldo             4(%0),%0                ; Yes.  Perform add.
335         extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?
336         extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.
337         ldo             2(%0),%0                ; Yes.  Perform add.
338         extru           %1,30,1,%1              ; Extract bit 1.
339         sub             %0,%1,%0                ; Subtract it.
340         " : "=r" (count), "=r" (__tmp) : "1" (x));                      \
341   } while (0)
342 #endif
343
344 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
345 #define umul_ppmm(xh, xl, m0, m1) \
346   do {                                                                  \
347     union {UDItype __ll;                                                \
348            struct {USItype __h, __l;} __i;                              \
349           } __xx;                                                       \
350     USItype __m0 = (m0), __m1 = (m1);                                   \
351     __asm__ ("mr %0,%3"                                                 \
352              : "=r" (__xx.__i.__h),                                     \
353                "=r" (__xx.__i.__l)                                      \
354              : "%1" (__m0),                                             \
355                "r" (__m1));                                             \
356     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
357     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
358              + (((SItype) __m1 >> 31) & __m0));                         \
359   } while (0)
360 #define smul_ppmm(xh, xl, m0, m1) \
361   do {                                                                  \
362     union {DItype __ll;                                                 \
363            struct {USItype __h, __l;} __i;                              \
364           } __xx;                                                       \
365     __asm__ ("mr %0,%3"                                                 \
366              : "=r" (__xx.__i.__h),                                     \
367                "=r" (__xx.__i.__l)                                      \
368              : "%1" (m0),                                               \
369                "r" (m1));                                               \
370     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
371   } while (0)
372 #define sdiv_qrnnd(q, r, n1, n0, d) \
373   do {                                                                  \
374     union {DItype __ll;                                                 \
375            struct {USItype __h, __l;} __i;                              \
376           } __xx;                                                       \
377     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
378     __asm__ ("dr %0,%2"                                                 \
379              : "=r" (__xx.__ll)                                         \
380              : "0" (__xx.__ll), "r" (d));                               \
381     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
382   } while (0)
383 #endif
384
385 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
386 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
387   __asm__ ("addl %5,%1
388         adcl %3,%0"                                                     \
389            : "=r" ((USItype)(sh)),                                      \
390              "=&r" ((USItype)(sl))                                      \
391            : "%0" ((USItype)(ah)),                                      \
392              "g" ((USItype)(bh)),                                       \
393              "%1" ((USItype)(al)),                                      \
394              "g" ((USItype)(bl)))
395 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
396   __asm__ ("subl %5,%1
397         sbbl %3,%0"                                                     \
398            : "=r" ((USItype)(sh)),                                      \
399              "=&r" ((USItype)(sl))                                      \
400            : "0" ((USItype)(ah)),                                       \
401              "g" ((USItype)(bh)),                                       \
402              "1" ((USItype)(al)),                                       \
403              "g" ((USItype)(bl)))
404 #define umul_ppmm(w1, w0, u, v) \
405   __asm__ ("mull %3"                                                    \
406            : "=a" ((USItype)(w0)),                                      \
407              "=d" ((USItype)(w1))                                       \
408            : "%0" ((USItype)(u)),                                       \
409              "rm" ((USItype)(v)))
410 #define udiv_qrnnd(q, r, n1, n0, d) \
411   __asm__ ("divl %4"                                                    \
412            : "=a" ((USItype)(q)),                                       \
413              "=d" ((USItype)(r))                                        \
414            : "0" ((USItype)(n0)),                                       \
415              "1" ((USItype)(n1)),                                       \
416              "rm" ((USItype)(d)))
417 #define count_leading_zeros(count, x) \
418   do {                                                                  \
419     USItype __cbtmp;                                                    \
420     __asm__ ("bsrl %1,%0"                                               \
421              : "=r" (__cbtmp) : "rm" ((USItype)(x)));                   \
422     (count) = __cbtmp ^ 31;                                             \
423   } while (0)
424 #define count_trailing_zeros(count, x) \
425   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
426 #ifndef UMUL_TIME
427 #define UMUL_TIME 40
428 #endif
429 #ifndef UDIV_TIME
430 #define UDIV_TIME 40
431 #endif
432 #endif /* 80x86 */
433
434 #if defined (__i960__) && W_TYPE_SIZE == 32
435 #define umul_ppmm(w1, w0, u, v) \
436   ({union {UDItype __ll;                                                \
437            struct {USItype __l, __h;} __i;                              \
438           } __xx;                                                       \
439   __asm__ ("emul        %2,%1,%0"                                       \
440            : "=d" (__xx.__ll)                                           \
441            : "%dI" ((USItype)(u)),                                      \
442              "dI" ((USItype)(v)));                                      \
443   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
444 #define __umulsidi3(u, v) \
445   ({UDItype __w;                                                        \
446     __asm__ ("emul      %2,%1,%0"                                       \
447              : "=d" (__w)                                               \
448              : "%dI" ((USItype)(u)),                                    \
449                "dI" ((USItype)(v)));                                    \
450     __w; })  
451 #endif /* __i960__ */
452
453 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
454 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
455   __asm__ ("add%.l %5,%1
456         addx%.l %3,%0"                                                  \
457            : "=d" ((USItype)(sh)),                                      \
458              "=&d" ((USItype)(sl))                                      \
459            : "%0" ((USItype)(ah)),                                      \
460              "d" ((USItype)(bh)),                                       \
461              "%1" ((USItype)(al)),                                      \
462              "g" ((USItype)(bl)))
463 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
464   __asm__ ("sub%.l %5,%1
465         subx%.l %3,%0"                                                  \
466            : "=d" ((USItype)(sh)),                                      \
467              "=&d" ((USItype)(sl))                                      \
468            : "0" ((USItype)(ah)),                                       \
469              "d" ((USItype)(bh)),                                       \
470              "1" ((USItype)(al)),                                       \
471              "g" ((USItype)(bl)))
472 #if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
473 #define umul_ppmm(w1, w0, u, v) \
474   __asm__ ("mulu%.l %3,%1:%0"                                           \
475            : "=d" ((USItype)(w0)),                                      \
476              "=d" ((USItype)(w1))                                       \
477            : "%0" ((USItype)(u)),                                       \
478              "dmi" ((USItype)(v)))
479 #define UMUL_TIME 45
480 #define udiv_qrnnd(q, r, n1, n0, d) \
481   __asm__ ("divu%.l %4,%1:%0"                                           \
482            : "=d" ((USItype)(q)),                                       \
483              "=d" ((USItype)(r))                                        \
484            : "0" ((USItype)(n0)),                                       \
485              "1" ((USItype)(n1)),                                       \
486              "dmi" ((USItype)(d)))
487 #define UDIV_TIME 90
488 #define sdiv_qrnnd(q, r, n1, n0, d) \
489   __asm__ ("divs%.l %4,%1:%0"                                           \
490            : "=d" ((USItype)(q)),                                       \
491              "=d" ((USItype)(r))                                        \
492            : "0" ((USItype)(n0)),                                       \
493              "1" ((USItype)(n1)),                                       \
494              "dmi" ((USItype)(d)))
495 #define count_leading_zeros(count, x) \
496   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
497            : "=d" ((USItype)(count))                                    \
498            : "od" ((USItype)(x)), "n" (0))
499 #else /* not mc68020 */
500 #define umul_ppmmxx(xh, xl, a, b) \
501   do { USItype __umul_tmp1, __umul_tmp2;                                \
502         __asm__ ("| Inlined umul_ppmm
503         move%.l %5,%3
504         move%.l %2,%0
505         move%.w %3,%1
506         swap    %3
507         swap    %0
508         mulu    %2,%1
509         mulu    %3,%0
510         mulu    %2,%3
511         swap    %2
512         mulu    %5,%2
513         add%.l  %3,%2
514         jcc     1f
515         add%.l  %#0x10000,%0
516 1:      move%.l %2,%3
517         clr%.w  %2
518         swap    %2
519         swap    %3
520         clr%.w  %3
521         add%.l  %3,%1
522         addx%.l %2,%0
523         | End inlined umul_ppmm"                                        \
524               : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)),           \
525                 "=d" (__umul_tmp1), "=&d" (__umul_tmp2)                 \
526               : "%2" ((USItype)(a)), "d" ((USItype)(b)));               \
527   } while (0)
528 #define UMUL_TIME 100
529 #define UDIV_TIME 400
530 #endif /* not mc68020 */
531 #endif /* mc68000 */
532
533 #if defined (__m88000__) && W_TYPE_SIZE == 32
534 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
535   __asm__ ("addu.co %1,%r4,%r5
536         addu.ci %0,%r2,%r3"                                             \
537            : "=r" ((USItype)(sh)),                                      \
538              "=&r" ((USItype)(sl))                                      \
539            : "%rJ" ((USItype)(ah)),                                     \
540              "rJ" ((USItype)(bh)),                                      \
541              "%rJ" ((USItype)(al)),                                     \
542              "rJ" ((USItype)(bl)))
543 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
544   __asm__ ("subu.co %1,%r4,%r5
545         subu.ci %0,%r2,%r3"                                             \
546            : "=r" ((USItype)(sh)),                                      \
547              "=&r" ((USItype)(sl))                                      \
548            : "rJ" ((USItype)(ah)),                                      \
549              "rJ" ((USItype)(bh)),                                      \
550              "rJ" ((USItype)(al)),                                      \
551              "rJ" ((USItype)(bl)))
552 #define count_leading_zeros(count, x) \
553   do {                                                                  \
554     USItype __cbtmp;                                                    \
555     __asm__ ("ff1 %0,%1"                                                \
556              : "=r" (__cbtmp)                                           \
557              : "r" ((USItype)(x)));                                     \
558     (count) = __cbtmp ^ 31;                                             \
559   } while (0)
560 #if defined (__m88110__)
561 #define umul_ppmm(wh, wl, u, v) \
562   do {                                                                  \
563     union {UDItype __ll;                                                \
564            struct {USItype __h, __l;} __i;                              \
565           } __xx;                                                       \
566     __asm__ ("mulu.d    %0,%1,%2"                                       \
567              : "=r" (__xx.__ll)                                         \
568              : "r" ((USItype)(u)),                                      \
569                "r" ((USItype)(v)));                                     \
570     (wh) = __xx.__i.__h;                                                \
571     (wl) = __xx.__i.__l;                                                \
572   } while (0)
573 #define udiv_qrnnd(q, r, n1, n0, d) \
574   ({union {UDItype __ll;                                                \
575            struct {USItype __h, __l;} __i;                              \
576           } __xx;                                                       \
577   USItype __q;                                                          \
578   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
579   __asm__ ("divu.d %0,%1,%2"                                            \
580            : "=r" (__q)                                                 \
581            : "r" (__xx.__ll),                                           \
582              "r" ((USItype)(d)));                                       \
583   (r) = (n0) - __q * (d); (q) = __q; })
584 #define UMUL_TIME 5
585 #define UDIV_TIME 25
586 #else
587 #define UMUL_TIME 17
588 #define UDIV_TIME 150
589 #endif /* __m88110__ */
590 #endif /* __m88000__ */
591
592 #if defined (__mips__) && W_TYPE_SIZE == 32
593 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
594 #define umul_ppmm(w1, w0, u, v) \
595   __asm__ ("multu %2,%3"                                                \
596            : "=l" ((USItype)(w0)),                                      \
597              "=h" ((USItype)(w1))                                       \
598            : "d" ((USItype)(u)),                                        \
599              "d" ((USItype)(v)))
600 #else
601 #define umul_ppmm(w1, w0, u, v) \
602   __asm__ ("multu %2,%3
603         mflo %0
604         mfhi %1"                                                        \
605            : "=d" ((USItype)(w0)),                                      \
606              "=d" ((USItype)(w1))                                       \
607            : "d" ((USItype)(u)),                                        \
608              "d" ((USItype)(v)))
609 #endif
610 #define UMUL_TIME 10
611 #define UDIV_TIME 100
612 #endif /* __mips__ */
613
614 #if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
615 #if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
616 #define umul_ppmm(w1, w0, u, v) \
617   __asm__ ("dmultu %2,%3"                                               \
618            : "=l" ((UDItype)(w0)),                                      \
619              "=h" ((UDItype)(w1))                                       \
620            : "d" ((UDItype)(u)),                                        \
621              "d" ((UDItype)(v)))
622 #else
623 #define umul_ppmm(w1, w0, u, v) \
624   __asm__ ("dmultu %2,%3
625         mflo %0
626         mfhi %1"                                                        \
627            : "=d" ((UDItype)(w0)),                                      \
628              "=d" ((UDItype)(w1))                                       \
629            : "d" ((UDItype)(u)),                                        \
630              "d" ((UDItype)(v)))
631 #endif
632 #define UMUL_TIME 20
633 #define UDIV_TIME 140
634 #endif /* __mips__ */
635
636 #if defined (__ns32000__) && W_TYPE_SIZE == 32
637 #define umul_ppmm(w1, w0, u, v) \
638   ({union {UDItype __ll;                                                \
639            struct {USItype __l, __h;} __i;                              \
640           } __xx;                                                       \
641   __asm__ ("meid %2,%0"                                                 \
642            : "=g" (__xx.__ll)                                           \
643            : "%0" ((USItype)(u)),                                       \
644              "g" ((USItype)(v)));                                       \
645   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
646 #define __umulsidi3(u, v) \
647   ({UDItype __w;                                                        \
648     __asm__ ("meid %2,%0"                                               \
649              : "=g" (__w)                                               \
650              : "%0" ((USItype)(u)),                                     \
651                "g" ((USItype)(v)));                                     \
652     __w; })
653 #define udiv_qrnnd(q, r, n1, n0, d) \
654   ({union {UDItype __ll;                                                \
655            struct {USItype __l, __h;} __i;                              \
656           } __xx;                                                       \
657   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
658   __asm__ ("deid %2,%0"                                                 \
659            : "=g" (__xx.__ll)                                           \
660            : "0" (__xx.__ll),                                           \
661              "g" ((USItype)(d)));                                       \
662   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
663 #define count_trailing_zeros(count,x) \
664   do {
665     __asm__ ("ffsd      %2,%0"                                          \
666              : "=r" ((USItype) (count))                                 \
667              : "0" ((USItype) 0),                                       \
668                "r" ((USItype) (x)));                                    \
669   } while (0)
670 #endif /* __ns32000__ */
671
672 #if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
673 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
674   do {                                                                  \
675     if (__builtin_constant_p (bh) && (bh) == 0)                         \
676       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
677              : "=r" ((USItype)(sh)),                                    \
678                "=&r" ((USItype)(sl))                                    \
679              : "%r" ((USItype)(ah)),                                    \
680                "%r" ((USItype)(al)),                                    \
681                "rI" ((USItype)(bl)));                                   \
682     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
683       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
684              : "=r" ((USItype)(sh)),                                    \
685                "=&r" ((USItype)(sl))                                    \
686              : "%r" ((USItype)(ah)),                                    \
687                "%r" ((USItype)(al)),                                    \
688                "rI" ((USItype)(bl)));                                   \
689     else                                                                \
690       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
691              : "=r" ((USItype)(sh)),                                    \
692                "=&r" ((USItype)(sl))                                    \
693              : "%r" ((USItype)(ah)),                                    \
694                "r" ((USItype)(bh)),                                     \
695                "%r" ((USItype)(al)),                                    \
696                "rI" ((USItype)(bl)));                                   \
697   } while (0)
698 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
699   do {                                                                  \
700     if (__builtin_constant_p (ah) && (ah) == 0)                         \
701       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
702                : "=r" ((USItype)(sh)),                                  \
703                  "=&r" ((USItype)(sl))                                  \
704                : "r" ((USItype)(bh)),                                   \
705                  "rI" ((USItype)(al)),                                  \
706                  "r" ((USItype)(bl)));                                  \
707     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
708       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
709                : "=r" ((USItype)(sh)),                                  \
710                  "=&r" ((USItype)(sl))                                  \
711                : "r" ((USItype)(bh)),                                   \
712                  "rI" ((USItype)(al)),                                  \
713                  "r" ((USItype)(bl)));                                  \
714     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
715       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
716                : "=r" ((USItype)(sh)),                                  \
717                  "=&r" ((USItype)(sl))                                  \
718                : "r" ((USItype)(ah)),                                   \
719                  "rI" ((USItype)(al)),                                  \
720                  "r" ((USItype)(bl)));                                  \
721     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
722       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
723                : "=r" ((USItype)(sh)),                                  \
724                  "=&r" ((USItype)(sl))                                  \
725                : "r" ((USItype)(ah)),                                   \
726                  "rI" ((USItype)(al)),                                  \
727                  "r" ((USItype)(bl)));                                  \
728     else                                                                \
729       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
730                : "=r" ((USItype)(sh)),                                  \
731                  "=&r" ((USItype)(sl))                                  \
732                : "r" ((USItype)(ah)),                                   \
733                  "r" ((USItype)(bh)),                                   \
734                  "rI" ((USItype)(al)),                                  \
735                  "r" ((USItype)(bl)));                                  \
736   } while (0)
737 #define count_leading_zeros(count, x) \
738   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
739            : "=r" ((USItype)(count))                                    \
740            : "r" ((USItype)(x)))
741 #if defined (_ARCH_PPC)
742 #define umul_ppmm(ph, pl, m0, m1) \
743   do {                                                                  \
744     USItype __m0 = (m0), __m1 = (m1);                                   \
745     __asm__ ("mulhwu %0,%1,%2"                                          \
746              : "=r" ((USItype) ph)                                      \
747              : "%r" (__m0),                                             \
748                "r" (__m1));                                             \
749     (pl) = __m0 * __m1;                                                 \
750   } while (0)
751 #define UMUL_TIME 15
752 #define smul_ppmm(ph, pl, m0, m1) \
753   do {                                                                  \
754     SItype __m0 = (m0), __m1 = (m1);                                    \
755     __asm__ ("mulhw %0,%1,%2"                                           \
756              : "=r" ((SItype) ph)                                       \
757              : "%r" (__m0),                                             \
758                "r" (__m1));                                             \
759     (pl) = __m0 * __m1;                                                 \
760   } while (0)
761 #define SMUL_TIME 14
762 #define UDIV_TIME 120
763 #else
764 #define umul_ppmm(xh, xl, m0, m1) \
765   do {                                                                  \
766     USItype __m0 = (m0), __m1 = (m1);                                   \
767     __asm__ ("mul %0,%2,%3"                                             \
768              : "=r" ((USItype)(xh)),                                    \
769                "=q" ((USItype)(xl))                                     \
770              : "r" (__m0),                                              \
771                "r" (__m1));                                             \
772     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
773              + (((SItype) __m1 >> 31) & __m0));                         \
774   } while (0)
775 #define UMUL_TIME 8
776 #define smul_ppmm(xh, xl, m0, m1) \
777   __asm__ ("mul %0,%2,%3"                                               \
778            : "=r" ((SItype)(xh)),                                       \
779              "=q" ((SItype)(xl))                                        \
780            : "r" (m0),                                                  \
781              "r" (m1))
782 #define SMUL_TIME 4
783 #define sdiv_qrnnd(q, r, nh, nl, d) \
784   __asm__ ("div %0,%2,%4"                                               \
785            : "=r" ((SItype)(q)), "=q" ((SItype)(r))                     \
786            : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
787 #define UDIV_TIME 100
788 #endif
789 #endif /* Power architecture variants.  */
790
791 #if defined (__pyr__) && W_TYPE_SIZE == 32
792 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
793   __asm__ ("addw        %5,%1
794         addwc   %3,%0"                                                  \
795            : "=r" ((USItype)(sh)),                                      \
796              "=&r" ((USItype)(sl))                                      \
797            : "%0" ((USItype)(ah)),                                      \
798              "g" ((USItype)(bh)),                                       \
799              "%1" ((USItype)(al)),                                      \
800              "g" ((USItype)(bl)))
801 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
802   __asm__ ("subw        %5,%1
803         subwb   %3,%0"                                                  \
804            : "=r" ((USItype)(sh)),                                      \
805              "=&r" ((USItype)(sl))                                      \
806            : "0" ((USItype)(ah)),                                       \
807              "g" ((USItype)(bh)),                                       \
808              "1" ((USItype)(al)),                                       \
809              "g" ((USItype)(bl)))
810 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
811 #define umul_ppmm(w1, w0, u, v) \
812   ({union {UDItype __ll;                                                \
813            struct {USItype __h, __l;} __i;                              \
814           } __xx;                                                       \
815   __asm__ ("movw %1,%R0
816         uemul %2,%0"                                                    \
817            : "=&r" (__xx.__ll)                                          \
818            : "g" ((USItype) (u)),                                       \
819              "g" ((USItype)(v)));                                       \
820   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
821 #endif /* __pyr__ */
822
823 #if defined (__ibm032__) /* RT/ROMP */  && W_TYPE_SIZE == 32
824 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
825   __asm__ ("a %1,%5
826         ae %0,%3"                                                       \
827            : "=r" ((USItype)(sh)),                                      \
828              "=&r" ((USItype)(sl))                                      \
829            : "%0" ((USItype)(ah)),                                      \
830              "r" ((USItype)(bh)),                                       \
831              "%1" ((USItype)(al)),                                      \
832              "r" ((USItype)(bl)))
833 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
834   __asm__ ("s %1,%5
835         se %0,%3"                                                       \
836            : "=r" ((USItype)(sh)),                                      \
837              "=&r" ((USItype)(sl))                                      \
838            : "0" ((USItype)(ah)),                                       \
839              "r" ((USItype)(bh)),                                       \
840              "1" ((USItype)(al)),                                       \
841              "r" ((USItype)(bl)))
842 #define umul_ppmm(ph, pl, m0, m1) \
843   do {                                                                  \
844     USItype __m0 = (m0), __m1 = (m1);                                   \
845     __asm__ (                                                           \
846        "s       r2,r2
847         mts     r10,%2
848         m       r2,%3
849         m       r2,%3
850         m       r2,%3
851         m       r2,%3
852         m       r2,%3
853         m       r2,%3
854         m       r2,%3
855         m       r2,%3
856         m       r2,%3
857         m       r2,%3
858         m       r2,%3
859         m       r2,%3
860         m       r2,%3
861         m       r2,%3
862         m       r2,%3
863         m       r2,%3
864         cas     %0,r2,r0
865         mfs     r10,%1"                                                 \
866              : "=r" ((USItype)(ph)),                                    \
867                "=r" ((USItype)(pl))                                     \
868              : "%r" (__m0),                                             \
869                 "r" (__m1)                                              \
870              : "r2");                                                   \
871     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
872              + (((SItype) __m1 >> 31) & __m0));                         \
873   } while (0)
874 #define UMUL_TIME 20
875 #define UDIV_TIME 200
876 #define count_leading_zeros(count, x) \
877   do {                                                                  \
878     if ((x) >= 0x10000)                                                 \
879       __asm__ ("clz     %0,%1"                                          \
880                : "=r" ((USItype)(count))                                \
881                : "r" ((USItype)(x) >> 16));                             \
882     else                                                                \
883       {                                                                 \
884         __asm__ ("clz   %0,%1"                                          \
885                  : "=r" ((USItype)(count))                              \
886                  : "r" ((USItype)(x)));                                 \
887         (count) += 16;                                                  \
888       }                                                                 \
889   } while (0)
890 #endif
891
892 #if defined (__sh2__) && W_TYPE_SIZE == 32
893 #define umul_ppmm(w1, w0, u, v) \
894   __asm__ (                                                             \
895        "dmulu.l %2,%3
896         sts     macl,%1
897         sts     mach,%0"                                                \
898            : "=r" ((USItype)(w1)),                                      \
899              "=r" ((USItype)(w0))                                       \
900            : "r" ((USItype)(u)),                                        \
901              "r" ((USItype)(v))                                         \
902            : "macl", "mach")
903 #define UMUL_TIME 5
904 #endif
905
906 #if defined (__sparc__) && W_TYPE_SIZE == 32
907 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
908   __asm__ ("addcc %r4,%5,%1
909         addx %r2,%3,%0"                                                 \
910            : "=r" ((USItype)(sh)),                                      \
911              "=&r" ((USItype)(sl))                                      \
912            : "%rJ" ((USItype)(ah)),                                     \
913              "rI" ((USItype)(bh)),                                      \
914              "%rJ" ((USItype)(al)),                                     \
915              "rI" ((USItype)(bl))                                       \
916            __CLOBBER_CC)
917 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
918   __asm__ ("subcc %r4,%5,%1
919         subx %r2,%3,%0"                                                 \
920            : "=r" ((USItype)(sh)),                                      \
921              "=&r" ((USItype)(sl))                                      \
922            : "rJ" ((USItype)(ah)),                                      \
923              "rI" ((USItype)(bh)),                                      \
924              "rJ" ((USItype)(al)),                                      \
925              "rI" ((USItype)(bl))                                       \
926            __CLOBBER_CC)
927 #if defined (__sparc_v8__)
928 /* Don't match immediate range because, 1) it is not often useful,
929    2) the 'I' flag thinks of the range as a 13 bit signed interval,
930    while we want to match a 13 bit interval, sign extended to 32 bits,
931    but INTERPRETED AS UNSIGNED.  */
932 #define umul_ppmm(w1, w0, u, v) \
933   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
934            : "=r" ((USItype)(w1)),                                      \
935              "=r" ((USItype)(w0))                                       \
936            : "r" ((USItype)(u)),                                        \
937              "r" ((USItype)(v)))
938 #define UMUL_TIME 5
939 #ifndef SUPERSPARC      /* SuperSPARC's udiv only handles 53 bit dividends */
940 #define udiv_qrnnd(q, r, n1, n0, d) \
941   do {                                                                  \
942     USItype __q;                                                        \
943     __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0"                     \
944              : "=r" ((USItype)(__q))                                    \
945              : "r" ((USItype)(n1)),                                     \
946                "r" ((USItype)(n0)),                                     \
947                "r" ((USItype)(d)));                                     \
948     (r) = (n0) - __q * (d);                                             \
949     (q) = __q;                                                          \
950   } while (0)
951 #define UDIV_TIME 25
952 #endif /* SUPERSPARC */
953 #else /* ! __sparc_v8__ */
954 #if defined (__sparclite__)
955 /* This has hardware multiply but not divide.  It also has two additional
956    instructions scan (ffs from high bit) and divscc.  */
957 #define umul_ppmm(w1, w0, u, v) \
958   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
959            : "=r" ((USItype)(w1)),                                      \
960              "=r" ((USItype)(w0))                                       \
961            : "r" ((USItype)(u)),                                        \
962              "r" ((USItype)(v)))
963 #define UMUL_TIME 5
964 #define udiv_qrnnd(q, r, n1, n0, d) \
965   __asm__ ("! Inlined udiv_qrnnd
966         wr      %%g0,%2,%%y     ! Not a delayed write for sparclite
967         tst     %%g0
968         divscc  %3,%4,%%g1
969         divscc  %%g1,%4,%%g1
970         divscc  %%g1,%4,%%g1
971         divscc  %%g1,%4,%%g1
972         divscc  %%g1,%4,%%g1
973         divscc  %%g1,%4,%%g1
974         divscc  %%g1,%4,%%g1
975         divscc  %%g1,%4,%%g1
976         divscc  %%g1,%4,%%g1
977         divscc  %%g1,%4,%%g1
978         divscc  %%g1,%4,%%g1
979         divscc  %%g1,%4,%%g1
980         divscc  %%g1,%4,%%g1
981         divscc  %%g1,%4,%%g1
982         divscc  %%g1,%4,%%g1
983         divscc  %%g1,%4,%%g1
984         divscc  %%g1,%4,%%g1
985         divscc  %%g1,%4,%%g1
986         divscc  %%g1,%4,%%g1
987         divscc  %%g1,%4,%%g1
988         divscc  %%g1,%4,%%g1
989         divscc  %%g1,%4,%%g1
990         divscc  %%g1,%4,%%g1
991         divscc  %%g1,%4,%%g1
992         divscc  %%g1,%4,%%g1
993         divscc  %%g1,%4,%%g1
994         divscc  %%g1,%4,%%g1
995         divscc  %%g1,%4,%%g1
996         divscc  %%g1,%4,%%g1
997         divscc  %%g1,%4,%%g1
998         divscc  %%g1,%4,%%g1
999         divscc  %%g1,%4,%0
1000         rd      %%y,%1
1001         bl,a 1f
1002         add     %1,%4,%1
1003 1:      ! End of inline udiv_qrnnd"                                     \
1004            : "=r" ((USItype)(q)),                                       \
1005              "=r" ((USItype)(r))                                        \
1006            : "r" ((USItype)(n1)),                                       \
1007              "r" ((USItype)(n0)),                                       \
1008              "rI" ((USItype)(d))                                        \
1009            : "%g1" __AND_CLOBBER_CC)
1010 #define UDIV_TIME 37
1011 #define count_leading_zeros(count, x) \
1012   __asm__ ("scan %1,0,%0"                                               \
1013            : "=r" ((USItype)(x))                                        \
1014            : "r" ((USItype)(count)))
1015 #endif /* __sparclite__ */
1016 #endif /* __sparc_v8__ */
1017 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd.  */
1018 #ifndef umul_ppmm
1019 #define umul_ppmm(w1, w0, u, v) \
1020   __asm__ ("! Inlined umul_ppmm
1021         wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr
1022         sra     %3,31,%%g2      ! Don't move this insn
1023         and     %2,%%g2,%%g2    ! Don't move this insn
1024         andcc   %%g0,0,%%g1     ! Don't move this insn
1025         mulscc  %%g1,%3,%%g1
1026         mulscc  %%g1,%3,%%g1
1027         mulscc  %%g1,%3,%%g1
1028         mulscc  %%g1,%3,%%g1
1029         mulscc  %%g1,%3,%%g1
1030         mulscc  %%g1,%3,%%g1
1031         mulscc  %%g1,%3,%%g1
1032         mulscc  %%g1,%3,%%g1
1033         mulscc  %%g1,%3,%%g1
1034         mulscc  %%g1,%3,%%g1
1035         mulscc  %%g1,%3,%%g1
1036         mulscc  %%g1,%3,%%g1
1037         mulscc  %%g1,%3,%%g1
1038         mulscc  %%g1,%3,%%g1
1039         mulscc  %%g1,%3,%%g1
1040         mulscc  %%g1,%3,%%g1
1041         mulscc  %%g1,%3,%%g1
1042         mulscc  %%g1,%3,%%g1
1043         mulscc  %%g1,%3,%%g1
1044         mulscc  %%g1,%3,%%g1
1045         mulscc  %%g1,%3,%%g1
1046         mulscc  %%g1,%3,%%g1
1047         mulscc  %%g1,%3,%%g1
1048         mulscc  %%g1,%3,%%g1
1049         mulscc  %%g1,%3,%%g1
1050         mulscc  %%g1,%3,%%g1
1051         mulscc  %%g1,%3,%%g1
1052         mulscc  %%g1,%3,%%g1
1053         mulscc  %%g1,%3,%%g1
1054         mulscc  %%g1,%3,%%g1
1055         mulscc  %%g1,%3,%%g1
1056         mulscc  %%g1,%3,%%g1
1057         mulscc  %%g1,0,%%g1
1058         add     %%g1,%%g2,%0
1059         rd      %%y,%1"                                                 \
1060            : "=r" ((USItype)(w1)),                                      \
1061              "=r" ((USItype)(w0))                                       \
1062            : "%rI" ((USItype)(u)),                                      \
1063              "r" ((USItype)(v))                                         \
1064            : "%g1", "%g2" __AND_CLOBBER_CC)
1065 #define UMUL_TIME 39            /* 39 instructions */
1066 #endif
1067 #ifndef udiv_qrnnd
1068 #ifndef LONGLONG_STANDALONE
1069 #define udiv_qrnnd(q, r, n1, n0, d) \
1070   do { USItype __r;                                                     \
1071     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
1072     (r) = __r;                                                          \
1073   } while (0)
1074 extern USItype __udiv_qrnnd ();
1075 #define UDIV_TIME 140
1076 #endif /* LONGLONG_STANDALONE */
1077 #endif /* udiv_qrnnd */
1078 #endif /* __sparc__ */
1079
1080 #if defined (__vax__) && W_TYPE_SIZE == 32
1081 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1082   __asm__ ("addl2 %5,%1
1083         adwc %3,%0"                                                     \
1084            : "=g" ((USItype)(sh)),                                      \
1085              "=&g" ((USItype)(sl))                                      \
1086            : "%0" ((USItype)(ah)),                                      \
1087              "g" ((USItype)(bh)),                                       \
1088              "%1" ((USItype)(al)),                                      \
1089              "g" ((USItype)(bl)))
1090 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1091   __asm__ ("subl2 %5,%1
1092         sbwc %3,%0"                                                     \
1093            : "=g" ((USItype)(sh)),                                      \
1094              "=&g" ((USItype)(sl))                                      \
1095            : "0" ((USItype)(ah)),                                       \
1096              "g" ((USItype)(bh)),                                       \
1097              "1" ((USItype)(al)),                                       \
1098              "g" ((USItype)(bl)))
1099 #define umul_ppmm(xh, xl, m0, m1) \
1100   do {                                                                  \
1101     union {UDItype __ll;                                                \
1102            struct {USItype __l, __h;} __i;                              \
1103           } __xx;                                                       \
1104     USItype __m0 = (m0), __m1 = (m1);                                   \
1105     __asm__ ("emul %1,%2,$0,%0"                                         \
1106              : "=g" (__xx.__ll)                                         \
1107              : "g" (__m0),                                              \
1108                "g" (__m1));                                             \
1109     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1110     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1111              + (((SItype) __m1 >> 31) & __m0));                         \
1112   } while (0)
1113 #define sdiv_qrnnd(q, r, n1, n0, d) \
1114   do {                                                                  \
1115     union {DItype __ll;                                                 \
1116            struct {SItype __l, __h;} __i;                               \
1117           } __xx;                                                       \
1118     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1119     __asm__ ("ediv %3,%2,%0,%1"                                         \
1120              : "=g" (q), "=g" (r)                                       \
1121              : "g" (__xx.ll), "g" (d));                                 \
1122   } while (0)
1123 #endif /* __vax__ */
1124
1125 #if defined (__z8000__) && W_TYPE_SIZE == 16
1126 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1127   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1128            : "=r" ((unsigned int)(sh)),                                 \
1129              "=&r" ((unsigned int)(sl))                                 \
1130            : "%0" ((unsigned int)(ah)),                                 \
1131              "r" ((unsigned int)(bh)),                                  \
1132              "%1" ((unsigned int)(al)),                                 \
1133              "rQR" ((unsigned int)(bl)))
1134 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1135   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1136            : "=r" ((unsigned int)(sh)),                                 \
1137              "=&r" ((unsigned int)(sl))                                 \
1138            : "0" ((unsigned int)(ah)),                                  \
1139              "r" ((unsigned int)(bh)),                                  \
1140              "1" ((unsigned int)(al)),                                  \
1141              "rQR" ((unsigned int)(bl)))
1142 #define umul_ppmm(xh, xl, m0, m1) \
1143   do {                                                                  \
1144     union {long int __ll;                                               \
1145            struct {unsigned int __h, __l;} __i;                         \
1146           } __xx;                                                       \
1147     unsigned int __m0 = (m0), __m1 = (m1);                              \
1148     __asm__ ("mult      %S0,%H3"                                        \
1149              : "=r" (__xx.__i.__h),                                     \
1150                "=r" (__xx.__i.__l)                                      \
1151              : "%1" (__m0),                                             \
1152                "rQR" (__m1));                                           \
1153     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1154     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1155              + (((signed int) __m1 >> 15) & __m0));                     \
1156   } while (0)
1157 #define umul_ppmm_off(xh, xl, m0, m1) \
1158   do {                                                                  \
1159     union {long int __ll;                                               \
1160            struct {unsigned int __h, __l;} __i;                         \
1161           } __xx;                                                       \
1162     __asm__ ("mult      %S0,%H3"                                        \
1163              : "=r" (__xx.__i.__h),                                     \
1164                "=r" (__xx.__i.__l)                                      \
1165              : "%1" (m0),                                               \
1166                "rQR" (m1));                                             \
1167     (xh) = __xx.__i.__h + ((((signed int) m0 >> 15) & m1)               \
1168                            + (((signed int) m1 >> 15) & m0));           \
1169     (xl) = __xx.__i.__l;                                                \
1170   } while (0)
1171 #endif /* __z8000__ */
1172
1173 #endif /* __GNUC__ */
1174
1175
1176 #if !defined (umul_ppmm) && defined (__umulsidi3)
1177 #define umul_ppmm(ph, pl, m0, m1) \
1178   {                                                                     \
1179     UDWtype __ll = __umulsidi3 (m0, m1);                                \
1180     ph = (UWtype) (__ll >> W_TYPE_SIZE);                                \
1181     pl = (UWtype) __ll;                                                 \
1182   }
1183 #endif
1184
1185 #if !defined (__umulsidi3)
1186 #define __umulsidi3(u, v) \
1187   ({UWtype __hi, __lo;                                                  \
1188     umul_ppmm (__hi, __lo, u, v);                                       \
1189     ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1190 #endif
1191
1192 /* If this machine has no inline assembler, use C macros.  */
1193
1194 #if !defined (add_ssaaaa)
1195 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1196   do {                                                                  \
1197     UWtype __x;                                                         \
1198     __x = (al) + (bl);                                                  \
1199     (sh) = (ah) + (bh) + (__x < (al));                                  \
1200     (sl) = __x;                                                         \
1201   } while (0)
1202 #endif
1203
1204 #if !defined (sub_ddmmss)
1205 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1206   do {                                                                  \
1207     UWtype __x;                                                         \
1208     __x = (al) - (bl);                                                  \
1209     (sh) = (ah) - (bh) - (__x > (al));                                  \
1210     (sl) = __x;                                                         \
1211   } while (0)
1212 #endif
1213
1214 #if !defined (umul_ppmm)
1215 #define umul_ppmm(w1, w0, u, v)                                         \
1216   do {                                                                  \
1217     UWtype __x0, __x1, __x2, __x3;                                      \
1218     UHWtype __ul, __vl, __uh, __vh;                                     \
1219     UWtype __u = (u), __v = (v);                                        \
1220                                                                         \
1221     __ul = __ll_lowpart (__u);                                          \
1222     __uh = __ll_highpart (__u);                                         \
1223     __vl = __ll_lowpart (__v);                                          \
1224     __vh = __ll_highpart (__v);                                         \
1225                                                                         \
1226     __x0 = (UWtype) __ul * __vl;                                        \
1227     __x1 = (UWtype) __ul * __vh;                                        \
1228     __x2 = (UWtype) __uh * __vl;                                        \
1229     __x3 = (UWtype) __uh * __vh;                                        \
1230                                                                         \
1231     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1232     __x1 += __x2;               /* but this indeed can */               \
1233     if (__x1 < __x2)            /* did we get it? */                    \
1234       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1235                                                                         \
1236     (w1) = __x3 + __ll_highpart (__x1);                                 \
1237     (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1238   } while (0)
1239 #endif
1240
1241 #if !defined (umul_ppmm)
1242 #define smul_ppmm(w1, w0, u, v)                                         \
1243   do {                                                                  \
1244     UWtype __w1;                                                        \
1245     UWtype __m0 = (u), __m1 = (v);                                      \
1246     umul_ppmm (__w1, w0, __m0, __m1);                                   \
1247     (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1)                 \
1248                 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0);                \
1249   } while (0)
1250 #endif
1251
1252 /* Define this unconditionally, so it can be used for debugging.  */
1253 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1254   do {                                                                  \
1255     UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;                     \
1256     __d1 = __ll_highpart (d);                                           \
1257     __d0 = __ll_lowpart (d);                                            \
1258                                                                         \
1259     __r1 = (n1) % __d1;                                                 \
1260     __q1 = (n1) / __d1;                                                 \
1261     __m = (UWtype) __q1 * __d0;                                         \
1262     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1263     if (__r1 < __m)                                                     \
1264       {                                                                 \
1265         __q1--, __r1 += (d);                                            \
1266         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1267           if (__r1 < __m)                                               \
1268             __q1--, __r1 += (d);                                        \
1269       }                                                                 \
1270     __r1 -= __m;                                                        \
1271                                                                         \
1272     __r0 = __r1 % __d1;                                                 \
1273     __q0 = __r1 / __d1;                                                 \
1274     __m = (UWtype) __q0 * __d0;                                         \
1275     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1276     if (__r0 < __m)                                                     \
1277       {                                                                 \
1278         __q0--, __r0 += (d);                                            \
1279         if (__r0 >= (d))                                                \
1280           if (__r0 < __m)                                               \
1281             __q0--, __r0 += (d);                                        \
1282       }                                                                 \
1283     __r0 -= __m;                                                        \
1284                                                                         \
1285     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1286     (r) = __r0;                                                         \
1287   } while (0)
1288
1289 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1290    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1291 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1292 #define udiv_qrnnd(q, r, nh, nl, d) \
1293   do {                                                                  \
1294     UWtype __r;                                                         \
1295     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1296     (r) = __r;                                                          \
1297   } while (0)
1298 #endif
1299
1300 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1301 #if !defined (udiv_qrnnd)
1302 #define UDIV_NEEDS_NORMALIZATION 1
1303 #define udiv_qrnnd __udiv_qrnnd_c
1304 #endif
1305
1306 #if !defined (count_leading_zeros)
1307 extern
1308 #ifdef __STDC__
1309 const
1310 #endif
1311 unsigned char __clz_tab[];
1312 #define count_leading_zeros(count, x) \
1313   do {                                                                  \
1314     UWtype __xr = (x);                                                  \
1315     UWtype __a;                                                         \
1316                                                                         \
1317     if (W_TYPE_SIZE <= 32)                                              \
1318       {                                                                 \
1319         __a = __xr < ((UWtype) 1 << 2*__BITS4)                          \
1320           ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4)              \
1321           : (__xr < ((UWtype) 1 << 3*__BITS4) ?  2*__BITS4 : 3*__BITS4);\
1322       }                                                                 \
1323     else                                                                \
1324       {                                                                 \
1325         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1326           if (((__xr >> __a) & 0xff) != 0)                              \
1327             break;                                                      \
1328       }                                                                 \
1329                                                                         \
1330     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1331   } while (0)
1332 /* This version gives a well-defined value for zero. */
1333 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1334 #endif
1335
1336 #if !defined (count_trailing_zeros)
1337 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1338    defined in asm, but if it is not, the C version above is good enough.  */
1339 #define count_trailing_zeros(count, x) \
1340   do {                                                                  \
1341     UWtype __ctz_x = (x);                                               \
1342     UWtype __ctz_c;                                                     \
1343     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1344     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1345   } while (0)
1346 #endif
1347
1348 #ifndef UDIV_NEEDS_NORMALIZATION
1349 #define UDIV_NEEDS_NORMALIZATION 0
1350 #endif