(feenableexcept): Correct setting of MXCSR.
authordrepper <drepper>
Mon, 16 Jun 2003 08:01:10 +0000 (08:01 +0000)
committerdrepper <drepper>
Mon, 16 Jun 2003 08:01:10 +0000 (08:01 +0000)
commit215b53d224bb90c5a908bffdc5b8876931c0f53c
tree1e1a787a1f02a4a3e67bb53283c017fd98cada92
parentc72376d3be759c37a5cc5d041e668521be74896f
(feenableexcept): Correct setting of MXCSR.
sysdeps/i386/fpu/feenablxcpt.c